
113
AT89C51RB2/RC2
4180E–8051–10/06
External Program Memory
Read Cycle
External Data Memory
Characteristics
Table 78. Symbol Description
T
PLIV
TPLAZ
ALE
PSEN
PORT 0
PORT 2
A0-A7
INSTR IN
ADDRESS
OR SFR-P2
ADDRESS A8-A15
12 T
CLCL
T
AVIV
TLHLL
T
AVLL
TLLIV
TLLPL
TPLPH
T
PXAV
TPXIX
T
PXIZ
TLLAX
Symbol
Parameter
TRLRH
RD Pulse Width
TWLWH
WR Pulse Width
TRLDV
RD to Valid Data In
TRHDX
Data Hold After RD
TRHDZ
Data Float After RD
TLLDV
ALE to Valid Data In
TAVDV
Address to Valid Data In
TLLWL
ALE to WR or RD
TAVWL
Address to WR or RD
TQVWX
Data Valid to WR Transition
TQVWH
Data set-up to WR High
TWHQX
Data Hold After WR
TRLAZ
RD Low to Address Float
TWHLH
RD or WR High to ALE high